Qwen is licensed under the Qwen RESEARCH LICENSE AGREEMENT, Copyright (c) 2026 Hangzhou Tongyi Laboratory Technology Co., Ltd. All Rights Reserved.

This repository is a derivative work of Qwen/Qwen-Image-2.1, produced by Viggle.
Built with Qwen.

It contains:
  ADDED     Qwen-Image-2.1-viggle-turbo-v0.3-6step-lora-r256.safetensors - v0.3: a distilled LoRA adapter (rank 256, alpha 256) for the base transformer, sampled in 6 steps, stored bf16
  ADDED     peft_v0.3/ - the same v0.3 adapter in peft key format, F32
  ADDED     Qwen-Image-2.1-viggle-turbo-v0.3-6step-lora-r128.safetensors - the v0.3 adapter truncated to rank 128 (alpha 128) by per-layer SVD, stored bf16
  ADDED     Qwen-Image-2.1-viggle-turbo-v0.3-6step-{int8_convrot,fp8_e4m3fn}.safetensors, -{Q8_0,Q6_K,Q5_K_M,Q4_K_M}.gguf - the base transformer with the v0.3 r256 adapter merged in fp32, then quantized (int8 convrot / fp8 e4m3fn weight-only / GGUF)
  ADDED     comfyui/ - ComfyUI custom nodes (viggle_turbo.py) and text-to-image / edit workflows, and the edit workflow's two example input photos (comfyui/input/); no model weights
  ADDED     Qwen-Image-2.1-viggle-turbo-v0.2.1-6step-lora-r256.safetensors - v0.2.1: the previous distilled LoRA adapter (rank 256, alpha 256), sampled in 6 steps, stored bf16
  ADDED     peft_v0.2.1/ - the same v0.2.1 adapter in peft key format, F32
  ADDED     Qwen-Image-2.1-viggle-turbo-v0.2.1-6step-lora-r128.safetensors - the v0.2.1 adapter truncated to rank 128 (alpha 128) by per-layer SVD, stored bf16
  ADDED     Qwen-Image-2.1-viggle-turbo-v0.2.1-6step-{int8_convrot,fp8_e4m3fn}.safetensors, -{Q8_0,Q6_K,Q5_K_M,Q4_K_M}.gguf - the same for the v0.2.1 adapter
  ADDED     Qwen-Image-2.1-viggle-turbo-v0.2-5step-lora-r256.safetensors - v0.2: an earlier distilled LoRA adapter (rank 256, alpha 256), sampled in 5 or 6 steps, stored bf16
  ADDED     peft_v0.2/ - the same v0.2 adapter in peft key format, F32
  ADDED     Qwen-Image-2.1-viggle-turbo-v0.2-5step-lora-r128.safetensors - the v0.2 adapter truncated to rank 128 (alpha 128) by per-layer SVD, stored bf16
  ADDED     Qwen-Image-2.1-viggle-turbo-4step-lora-r64.safetensors - v0.1: a 4-step distilled LoRA adapter (rank 64, alpha 64), stored bf16
  ADDED     peft/ - the same v0.1 adapter in peft key format, F32
  MODIFIED  transformer/ - v0.1: the base transformer after a full-parameter 4-step distillation fine-tune, stored bf16
  MODIFIED  scheduler/scheduler_config.json - the base scheduler config with shift_terminal changed from 0.02 to null

No other file of the base model is copied or modified; processor/, text_encoder/ and vae/ are loaded from
Qwen/Qwen-Image-2.1 at runtime.